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mpq4432 36v , 2.2a, low quiescent current , synchronous , step - down converter aec - q100 qualified mp q4432 rev. 1 .0 www.monolithicpower.com 1 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. description the mpq 4432 is a synchronous , step - down , switching regulator with programmable frequency ( 35 0k hz to 2.5mhz ) and integrated , internal , high - side and low - side power mosfet s . the mpq4432 provides up to 2.2a of highly efficient output current with current mode control for fast loop response. the wide 3.3v to 36v input range accommodates a variety of step - down applications in automotive input environment s . the mpq4432 is i deal for battery - powered applications due to its extremely low quiescent current. the mpq 4432 employs advanced asynchronous mode ( aam ) to achieve high efficiency in light - load condition by scaling down the switching frequency to reduce switching and gate d riving losses. standard features include soft start, external clock sync hronization , enable control , and power good indication . high - duty cycle and low drop out mode are provided for automotive cold - crank. over - current protection (ocp) with valley - current detection is employed to prevent the inductor current from running away . h iccup mode reduces the average current greatly in short - circuit condition. the rmal shutdown provides reliable and fault - tolerant ope ration. the mpq 4432 is available in a qfn - 16 ( 3mmx4mm ) package . features ? wide 3. 3v to 36v operating input range ? 2.2a continuous output current ? 1a low shutdown mode current ? 10 a sleep mode quiescent current ? internal 9 0m? high - side and 4 0m? low - side mosfet s ? 3 50khz to 2. 5 mhz programmable switching frequency ? fixed output options : 3.3v , 3.8v, 5v ? synchronize to external cloc k , selectable in - phase or 180 out - of - phase ? power good indicator ? programmable soft - start time ? 8 0ns minimum on time ? selectable forced ccm or aam ? low dropout mode ? over - current protection (ocp) with valley - current detection and hiccup ? available in a qfn - 16 ( 3mmx4mm ) package ? available in wettable flank ? available in aecq - 100 g rade - 1 applications ? automotive systems ? industrial power systems all mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under quality assurance. mps and the future of analog ic technology are registered trademarks of monolithic power systems, inc.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 2 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application m p q 4 4 3 2 v i n e n v i n f r e q f b b s t v o u t s w g n d p h a s e v c c b i a s p g s s 3 . 3 t o 3 6 v s y n c
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 3 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering information part number * package top marking mpq 4432 gl ** qfn - 16 (3mmx4mm) see below mpq 4432 gl - aec1 ** qfn - 16 (3mmx4mm) see below mpq 4432 gle - aec1 *** qfn - 16 (3mmx4mm) see below * for tape & reel, add suffix C z (e.g. mpq 4432 gl C z) ** under qualification *** under qualification, wettable flank top marking (MPQ4432GL & mpq443 2gl - aec1) mp: mps prefix y: year code w : week code 4432 : first four digits of the part number lll: lot number top marking (MPQ4432GLe - aec1) mp: mps prefix y: year code w: week code 4432 : first four digits of the part number lll: lot number e: wettable lead flank
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 4 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package reference top view qfn - 16 (3mmx4mm) absolute maximum rat ings (1) supply v oltage ( v in ) ...................... - 0.3v to 40 v switch v oltage (v sw ) ........... - 0.3v to vin + 0.3v bst voltage (v bst ) ............................ v sw + 6.5 v en v oltage (v en ) ............................ - 0.3v to 40 v bias voltage (v bias ) ....................... - 0.3v to 20 v all o ther p ins ................................ .... - 0.3v to 6 v continuous power dissipation (t a = +25 c ) (2) qfn - 16 (3mmx4mm) ................................ . 2.6w operating j unction t emperature ................ 1 5 0 c lead t emperature ................................ .... 260 c storage t emperature .................. - 65c to 150 c recommended operating conditions supply v oltage ( v in ) ....................... 3.3v to 36v operating j unct ion t emp . (t j ) ... - 40 c to + 125 c thermal resistance ( 3 ) ja jc qfn - 16 (3mmx4mm) ............ 48 ....... 11 ... c/w notes : 1) absolute maximum ratings are rated under room temperature u nless otherwise noted. exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction - to - ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperatur e is calculated by p d (max)=(t j (max) - t a )/ ja . exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) measured on jesd51 - 7, 4 - layer pcb. 1 2 3 p h a s e v i n s w 4 p g n d 1 3 1 4 1 5 1 6 a g n d s s f b f r e q 5 6 7 8 e n s y n c p g b i a s 9 1 0 1 1 1 2 p g n d s w b s t v c c
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 5 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics v in = 12v, v en = 2v, t j = - 40 c to + 1 25 c, unless otherwise noted. typical values are at t j = +25 c . parameter symbol condition min typ max units vin quiescent current i q v fb = 0.85v, no load , no switching, t j = +25 c 10 18 a v fb = 0.85v, no load , no switching 10 25 vin shutdown current i shdn v en = 0v 1 5 a vin under - voltage lockout threshold rising inuv rising 2.4 2.8 3.2 v vin under - voltage lockout threshold hysteresis inuv hys 150 mv feedback reference voltage v ref 784 800 816 mv t j = 25 c 792 800 808 mv switching frequency f sw r freq = 180 k or from sync clock 400 475 550 khz r freq = 82 k or from sync clock 850 1000 1150 khz r freq = 27 k or from sync clock 2250 2500 2750 k hz minimum on time (4) t on_min 80 ns sync input low voltage v sync_low 0.4 v sync input high voltage v sync_high 1.8 v c urrent l imit i limit_hs duty cycle = 40% 4.1 5.2 6.7 a low - side valley current limit i limit_ls v out = 3.3 v , l = 4.7h 2.5 3.8 5.1 a zcd current i zcd 0.1 a reverse current limit i limit_reverse 3 a switch l eakage c urrent i sw_lkg 0.01 1 a hs s witch o n r esistance r on_hs v bst - v sw = 5v 9 0 155 m ls s witch o n r esistance r on_ls 40 75 m soft - start current i ss v ss = 0.8v 5 10 15 a en rising threshold v en_rising 0.9 1.05 1.2 v en threshold hysteresis v en_hys 120 mv pg rising threshold (v fb /v ref ) pg rising v fb rising 85 90 95 % v fb falling 105 110 115 pg falling threshold (v fb /v ref ) pg falling v fb falling 79 84 89 % v fb rising 113.5 118.5 123.5 % pg deglitch timer t pg _ deglitch pg from low to high 30 s pg from high to low 50 s pg output voltage low v pg_low i sink = 2ma 0.2 0.4 v vcc regulator v cc 5 v vcc load regulation i cc = 5ma 3 % thermal s hutdown (4) t sd 1 70 ? c thermal s hutdown hysteresis (4) t sd_hys 20 c note : 4) not tested in production . guaranteed by design and characterization.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 6 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics vin = 12v, v en = 2v, t j = - 40c to +125c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 7 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v en = 2v, t j = - 40c to +125c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 8 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 9 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 10 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 11 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 12 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 13 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 14 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 15 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) vin = 12v, v out = 3.3v, l = 10h, f sw = 500khz, aam, t a = +25c, unless otherwise noted.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 16 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions pin # name description 1 phase selectable in - phase or 180 out - of - phase of sync input. drive phase high to be in - phase ; drive phase low to be 180 out - of - phase . 2 vin input s upply. vin supplies power to all of the internal c ontrol circuitries and the power switch connected to sw. place a decoupling capacitor to ground close to vin to minimize switching spikes. 3, 10 sw switch node. sw is the output of the internal power switch. 4, 9 p gnd power g round. pgnd is the reference ground of the power device . pgnd requires careful consideration during pcb layout. for best results, connect p gnd with copper pours and vias. 5 en enable. pull en below the specified threshold to shut down the chip . pull en above the specified threshold to enable the chip. 6 sync synchronize. apply a 3 5 0khz to 2. 5 mhz clock signal to sync to synchronize the internal oscillator frequency to the external clock. the external clock should be at least 2 5 0khz larger than the r freq set frequency. sync can also be used to select forced ccm or aam . drive sync high before the chip starts up to choose forced ccm ; drive sync low or leave sync float ing to choose aam. 7 pg power g ood indicator . the output of pg is an open drain . pg goes high if the output voltage is within 10% of the nominal voltage. 8 bias external power supply for the internal regulator. connecting bias to an external power supply (5v v bias 18 v) reduces power dissipation and increases efficiency. float bias or connect bias to ground if it is not being used. 11 bst bootstrap. bst is the positive power supply for the high - side mosfet driver connected to sw . connect a bypass capacitor between bst and sw. 12 vcc internal b ias s upply . vcc supplies power to the internal control circuit and gate drivers. a 1 f d ecoupling capacitor to ground is required close to vcc . 13 agnd analog ground. agnd is the reference ground of the logic circuit. 14 ss soft - s tart i nput . place a n external capacitor from ss to a gnd to set the soft - start period. the mpq 4432 sources 10 a from ss to the soft - start capacitor at start - up. as the ss voltage rises, the feedback threshold voltage increases to limit inrush current during start - up. 15 fb feedback i nput. connect fb to the tap of an external resistor divider from the output to a gnd to set the output voltage. the feedback threshold voltage is 0.8v. place the resistor divider as close to fb as possible. avoid placing vias on the fb traces. 16 freq switching f requency p rogram . connect a resistor from freq to ground to set the switching frequency.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 17 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. block diagram figure 1 : functional block diagram o s c i l l a t o r p l l r e f e r e n c e e r r o r a m p l i f i e r c o n t r o l l o g i c , o c p , o t p , b s t r e f r e s h f b p g n d s w b s t v i n e n p g 9 0 % x v r e f i s w + + - s s + - v r e f v c c v f b v f b v c c v c c v c c r e g u l a t o r i r e v e r s e b i a s f r e q s y n c p h a s e a g n d v c r 1 4 6 0 k c 1 5 2 p f c 2 0 . 2 p f v c c v r e f + - v f b 1 1 0 % x v r e f l o g i c
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 18 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. timing sequence figure 2 : tim ing sequence v i n v c c t h r e s h o l d 0 0 0 0 0 e n v o p g s w v c c e n t h r e s h o l d s s 3 0 s 3 0 s 0 s t a r t - u p o c p o c r e l e a s e 5 0 % r e f o v 0 i l i l = i l i m i t 1 1 8 . 5 % v r e f 5 0 s n o r m a l n o r m a l n o r m a l e n s h u t d o w n 9 0 % v r e f 5 0 s 1 1 0 % v r e f 3 0 s 8 4 % v r e f
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 19 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. operation the mpq 4432 is a high - frequency, synchronous , rectified , step - down , switch - mode converter with integrated , internal , high - side and low - side power mosfet s . the mpq4432 offers a very compact solution that achieve s 2.2a of continuous output current with excellent load and line regulation over a wide 3.3 v to 36v input supply range. the mpq4432 features switching frequency programmable from 350khz to 2. 5 mhz , ext ernal soft start , power good indication, and precision current limit. its very low operational quiescent current makes it suitable for battery - powered applications. pulse width modulation (pwm ) control at moderate - to - high output current, the mpq 4432 operates in a fi xed - frequency, peak - current - control mode to regulate the output voltage. an internal clock initiates a pwm cycle. at the rising edge of the clock, t he high - side power mosfet (hs - fet) is turned on , and the inductor current rise s linearly to provide energy to the load. the hs - fet remains on until its current reaches the value set by the comp voltage (v comp ) , which is the output of the internal error amplifier . if the current in the hs - fet does not re ach v comp in one pwm period , the hs - fet remain s on, saving a turn - off operation. when the hs - fet is off, it remains off until the next clock cycle begins . the low - side mosfet (ls - fet) turns on immediately while the inductor current flow s through it . to avoid a shoot - through, dead time is inserted to prevent the hs - fet and ls - fet from turning on at the same time. for each turn on and turn off in a switching cycle, the hs - fet remains on and off with a minimum on and off time limit. forced ccm and aam the mpq 4432 has selectable forced continuous conduction mode ( ccm ) and advanced asynchronous mode ( aam ) (see figure 3) . driv e sync above its specified threshold before the chip starts up to force the device into ccm with a fixed frequency , regardless of th e output load current. once the device is in ccm, sync can be pulled low again or driven with an external clock if needed . the advantage of ccm is a controllable frequency and smaller output ripple, but it also has low efficiency at light load. drive sync below its specified threshold or leave sync float ing before the chip starts up to enable aam power - save mode . the mpq 4432 first enter s non - synchronous operation for as long as the inductor current approaches zero at light load. if the load is further decreased or is at no load , making v comp below the internally set aam v alue (v aam ), the mpq 4432 enter s sleep mode , consuming very low quiescent current to further improve light - load efficiency. in sleep mode, the internal clock is blocked first, and the mp q 4432 skips some pulses. since the fb voltage (v fb ) is lower than the internal 0.8v reference (v ref ), v comp ramp s up until it crosses over v aam . then the internal clock is reset , and the crossover time is taken as the benchmark of the next clock . this control scheme helps achieve high efficiency by scaling down the frequency to reduce switching and gate driver losses during light - load or no - load conditions. when the output current increases from light load condition, v comp becomes larger, and the switching frequency increases. if the dc value of v comp exceeds v aam , the operation mode resumes discontinuous conduction mode ( dcm ) or ccm , which have a constant switching frequency. figure 3 : forced ccm and aam error amplifier (ea) the error amplifier compares v fb with v ref and outputs a current proportional to the difference between the two. this output current then charge s or discharges the internal compensation network to form v comp , which control s the power mosfet current. the optimized internal compensation network minimizes the external component count and simplifies the control loop design. f o r c e d c c m i n d u c t o r c u r r e n t t t t l o a d d e c r e a s e d a a m i n d u c t o r c u r r e n t t t t l o a d d e c r e a s e d
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 20 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. internal regulator and bias most of the internal circuitry is powered by the 5 v internal regulator. this regulator takes vin and operates in the full vin range. when vin exceeds 5 v, the output of the regulator is in full regulation . when vin falls below 5 v , the output decreases following vin . a decoupling ceramic capacitor is needed close to vcc . for better thermal performance, connect bias to an external power supply between 5v to 18 v. the bias supply overrides vin to power the internal regulator. using the bias supply allows vcc to be derived from a high - efficiency external source, such as v out . float bias or connect bias to ground if it is not being used. under - voltage lockout (uvlo) under - voltage lockout (uvlo) protects the chip from operating at an insufficient supply voltage. the uvlo comparator monitors the output voltage of th e internal regulator ( vcc ) . the uvlo rising threshold is about 2.8 v with a 150mv hysteresis . enable control (en) en is a digital control pin that turns the regulator on and off. when en is pulled below its threshold voltage, the chip is put into the lowest shutdown current mode. pulling en above its threshold voltage turns on the part. do not float en . power good indicator (pg) the mpq 4432 has a power good (pg) indication . pg is the open drain of a mosfet and should be connected to vcc or an other voltage source through a resistor (e.g. : 100k?). in the presence of an input voltage, the mosfet turns on so that pg is pulled low before ss is ready. when the regulator output is within 10% of its nominal output , the pg output is pulled high after a delay ( typically 30 s ) . when the output voltage moves outside this range with a hysteresis , the pg output is pulled low with a 50 s delay to indicate a failure output status . progra mmable frequency the oscillating frequency of the mpq 4432 can be programmed either by an external frequency resistor ( r freq ) or by a logic level synchronization clock. the frequency resistor should be placed between freq and ground as close to the device as possible . t he value of r freq can be estimated with equation ( 1 ): ( 1 ) the calculated resistance may need fine tuning with a bench test. do not float freq even if an external sync clock is added . sync and phase the internal oscillator frequency can also be synchronized to an external clock ranging from 350khz to 2. 5 mhz through sync. the exte rnal clock should be at least 25 0khz larger than the r freq set frequency. en sure that the high amplitude of the sync clock is higher than 1.8v and the low amplitude is lower than 0.4v. there is no pulse width requirement , but ther e is always a parasitic capacitance of the pad, so if the pulse width is too short, a clear rising and falling edge may not be seen due to the parasitic capacitanc e. a pulse longer than 100ns is recommended in application. phase is used when two or more mpq 4432 devices are in parallel with the same sync clock. pulling phase high forces the device to operate in - phase of the sync clock. pulling phase low forces the device to be 180 out - of - phase of the sync clock. by setting different voltage s of phase , two devices can operate in 180 out - of - phase to r educe the total input current ripple , so a smaller input bypass capacitor can be used (see figure 4) . the phase rising threshold is about 2.5v with a 400mv hysteresis. figure 4 : in - phase and 1 80 out - of - phase ) ( 170000 ) ( 11 . 1 khz f k r s freq ? s y n c c l k s w 1 s w 2 t s w 1 , 2 h a s a 1 8 0 o p h a s e s h i f t s w 1 : p h a s e h i g h s w 2 : p h a s e l o w
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 21 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. sof t start (ss) soft start (ss) is implemented to prevent the converter output voltage from overshooting during start - up. when the chip starts up , an internal current source begins charging the external soft - start capacitor. when the soft - start voltage ( v ss ) is lower than the internal reference ( v ref ), v ss overrides v ref , so the error amplifier uses v ss as the reference. when v ss is higher than v ref , the error amplifier uses v ref as the reference. the soft - start time (t ss ) set by the external ss capacitor can be calculated with equation ( 2 ): ( 2 ) where c ss is the external ss capacitor, v ref = 0.8v , and i ss is the internal 10 a ss charge current. ss can be used for tracking and sequencing. pre - bias start - up a t start - up, if v fb is higher than v ss (the output has a pre - bias voltage ) , neither the hs - fet or ls - fet turn on until v ss is higher than v fb . over - current protection (ocp) and hiccup the mp q 4432 has cycle - by - cycle peak current limit protection with valley - current detection and hiccup mode. the power mosfet current is sensed accurately via a current sense mosfet. the current is then fed to the high - speed current comparator for current - mode control purpose s . during the hs - fet on - state, if the sensed current exceeds the peak current limit value set by the comp high - clamp voltage, the hs - fet turns off immediately. then the ls - fet turns on to discharge the energy, and the inductor current decreases. the hs - fet remains off unless the inductor valley current is lower than a certain current threshold (the valley current limit), even though the internal clock pulses high. if the inductor current does not drop below the valley current limit when the internal clock pulses high, the hs - fet misses the clock, and the switching frequency decreases to half the nominal value. both the peak and vall ey current limits keep the inductor current from running away during an overload or short - circuit condition. when the output is shorted to ground , the output voltage drop s below 5 0% of its nominal output . meanwhile , the peak current limit is kicked, and th e device consider s this to be an output dead short and trigger s hiccup mode immediately to restart the part periodically . in hiccup mode , the mpq 4432 disables its output power stage and slowly discharges the soft - start capacitor. the mpq4432 restart s with a full soft start when the soft - start capacitor is fully discharged. if the short - circuit condition still remains after the soft - start ends, the device repeat s this operation until the fault is removed and the output returns to the regulation level. this protection mode reduces the average short circuit current greatly to alleviate thermal issues and protect the regulator. floating driver and bootstrap charging a 0.1 f to 1 f external bootstrap capacitor powers the floating power mosfet driver. the fl oating driver has its own uvlo protection with a rising threshold of 2. 5 v and a hysteresis of 200 mv. the bootstrap capacitor voltage is charged to ~5v from vcc through a pmos pass transistor when the ls - fet is on. at high duty cycle operation or sleep - mode condition, the time period available to the bootstrap charging is less , so the bootstrap capacitor may not be charged sufficiently. in case the external circuit does not have sufficient voltage or time to charge the bootstrap capacitor, extra external circuitry can be used to ensure that the bootstrap voltage is in the normal operation region. ? ? ? ss ref ss ss c (nf) v (v) t (ms) i ( a)
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 22 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. bst refresh to improve drop out, the mpq 4432 is designed to operate at close to 100% duty cycle for as long as the b s t to sw voltage is greater than 2. 5 v. when the voltage from bst to sw drops below 2. 5 v, the hs - fet is turned off using a uvlo circuit , which forces the ls - fet on to refresh the charge on the bst capacitor. since the supply current sourced from the bst capacitor is low, the hs - fet can remain on for more switching cycles than are required to refresh the capacitor, thus making the effective duty cycle of the switching regulator high. the effective duty cycle during dropout of the regulator is influenced mainly by the voltage dr ops across the hs - fet, ls - fet , inductor resistance , and printed circuit board resistance. thermal shutdown thermal shutdown is implemented to prevent the chip from running away thermally . when the silicon die temperature exceeds its upper threshold, the power mosfets shut down . when the temperature drops below its lower threshold, the chip is enabled again. start - up and shutdown if both vin and en exceed their appropriate thresholds, the chip starts up . the reference block starts first, generating a stab l e reference voltage and current , and then the internal regulator is enabled. the regulator provides a stable supply for the rest of the circuitries. while the internal supply rail is up, an internal timer holds the power mosfet off for about 50 s to blank the start - up glitches. when the soft - start block is enabled, it first holds its ss output low to ensure that the rest of the circuitries are ready , and then slowly ramps up. three events can shut down the chip: vin low, e n low, and thermal shutdown. during the shutdown p rocedure, the signaling path is blocked first to avoid any fault triggering. v comp and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command , but its charging path is disabled.
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 23 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. a pplication information setting the output voltage an external resistor divider connected to fb sets the output voltage (see figure 5 ) . figure 5 : feedback network the feedback resistor ( r fb1 ) also sets the feedback loop bandwidth with the internal compensation capacitor. choose r fb1 to be around 40 k . r fb 2 can then be calculated with equation ( 3 ): ( 3 ) table 1 list s the recommended feedback resistor values for common output voltages. table 1 : resistor selection for common output voltages v out (v) r fb1 (k?) r fb 2 (k?) 3.3 41.2 (1%) 13 (1%) 5 68.1 (1%) 13 (1%) selecting the input capacitor the input current to the step - down converter is discontinuous and therefore requires a capacitor to supply ac current to the converter while maintaining the dc input voltage. for the best performance, use low esr capacitors. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for most application s , use a 4.7f to 10f capacitor. it is strongly recommended to use another lower - value capacitor (e.g. : 0.1f) with a small package siz e (0603) to absorb high - frequency switching noise. place the small er capacitor as close to v in and gnd as possible. since c in absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated with equation ( 4 ): ( 4 ) the wors t - case condition occurs at vin = 2v out , shown in equation ( 5 ): ( 5 ) for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum, or ceramic. when using electrolytic or tantalum capacitors, add a small, high - quality ceramic capacitor (e.g. : 0.1f) as close to the ic as possible. when using ceramic capacit ors, en sure that they have enough capacitance to provide a sufficient charge to prevent excessive voltage ripple at input. the input voltage ripple caused by capacitance can be estimated with equation ( 6 ): ( 6 ) selecting the outp ut capacitor the output capacitor maintains the dc output voltage. use ceramic, tantalum, or low - esr electrolytic capacitors. for best results, use low esr capacitors to keep the output voltage ripple low. the output voltage ripple can be estimated with eq uation ( 7 ): ( 7 ) where l is the inductor value , and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. r f b 1 v o u t f b m p q 4 4 3 2 r f b 2 fb1 fb2 out r r v 1 0.8v ? ? ? ? ? ? out out cin load in in vv i i (1 ) vv ? load cin i i 2 ? ? ? ? ? ? load out out in sw in in in i v v v (1 ) f c v v ? ? ? ? ? ? ?? out out out esr sw in sw out vv 1 v (1 ) (r ) f l v 8f c
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 24 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. for simplification, the output voltage ripple can be estimated with equation ( 8 ): ( 8 ) for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated with equation ( 9 ): ( 9 ) the characteristics of the output capacit or also affect the stability of the regulation system. the mpq44 32 can be optimized for a wide range of capacitance and esr values. selecting the inductor a 1h to 10h inductor with a dc current rating at least 25% higher than the maximum load current is recommended for most applications. for higher efficiency, choose an inductor with a low dc resistance. a larger value inductor results in less ripple current an d a lower output ripple voltage, but also has a larger physical size, higher series resistance, and lower saturation current. a good rule for determining the inductor value is to allow the inductor ripple current to be approximately 30% of the maximum load current. the inductance value can then be calculated with equation ( 10 ): ( 10 ) where ? i l is the peak - to - peak inductor ripple current. choose the inductor ripple current to be approximately 30% o f the maximum load current . the maximum inductor peak current can be calculated with equation ( 11 ): ( 11 ) vin uvlo setting the mpq 4432 has an internal , fixed , under - v oltage lockout (uvlo) threshold. the rising threshold is 2.8 v , while the falling threshold is about 2.65 v. for application s requiring a higher uvlo point, an external resistor divider between v in and en can be used to achieve a higher equivalent uvlo threshold (see figure 6 ). figure 6 : adjustable uvlo u sing en d ivider the uvlo threshold can be calculated with equation (1 2 ) and equation (1 3 ): ( 1 2 ) ( 1 3 ) where v en_rising = 1. 0 5v, and v en_falling = 0.93 v. external bst diode an external bst diode can enhance the efficiency of the regulator when the duty cycle is high. a power supply between 2.5v and 5v can be used to power the external bootstrap diode . vcc or v out is recommended for this power supply in the circuit (see figure 7 ). figure 7 : optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4 148, and the recommended bst capacitor value is 0.1f to 1f. vin en v in r up r down ? ? ? ? ? ? ? out out out 2 sw out in vv v (1 ) 8 f l c v ? ? ? ? ? ? out out out esr sw in vv v (1 ) r f l v ? ? ? ?? out out sw l in vv l (1 ) f i v ? ? ? ? ? out out lp load sw in vv i i (1 ) 2f l v en_rising down up rising v r r (1 inuv ? ? ? ) en_falling down up falling v r r (1 inuv ? ? ? ) c b s t c o u t l b s t s w e x t e r n a l b s t d i o d e i n 4 1 4 8 v c c / v o u t v c c v o u t r b s t
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 25 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. a resistor in series with the bst capacitor (r bst ) can reduce the sw rising rate and voltage spikes . this helps enhance emi performance and reduce voltage stress at a high vin. a higher resistance is better for s w spike reduction but compromise s efficiency. for a tradeoff between emi and efficiency, a 20 r bst is recommended. pcb layout guidelines efficient pcb layout , especially of the input capacitor placement , is critical f or stable operation . for best results, refer to figure 8 and follow t he guidelines below . a four - layer layout is strongly recommended to achieve better thermal performance. 1. place symmetric input capacitors as close to vin and gnd as possible . 2. use a large ground plane to connect directly to pgnd. if the bottom layer is a ground plane, add vias near pgnd. 3. ensure that the high - current paths at gnd and v in have short, direct, and wide traces. 4. place the ceramic input capacitor , especially the small package size (0603) input bypass capacitor , as close to v in and pgnd as possib le to minimize high frequency noise . 5. keep the connection of the input capacitor and in as short and wide as possible. 6. place the vcc capacitor as close to vcc and gnd as possible. 7. route sw and bst away from sensitive analog areas , such as fb. 8. place the fee dback resistors close to the chip to ensure that the trace connecting to fb is as short as possible. 9. use multiple vias to connect the power planes to the internal layers . top layer inner layer 1 inner layer 2 bottom layer figure 8 : recommended pcb layout
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 26 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits figure 9 : v out = 3.3v, f sw = 500khz figure 10 : v out = 3.3v, f sw = 500khz for <100k fb divider application 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 1 0 h l 1 2 2 f c 2 a 3 . 3 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 3 1 6 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 1 m r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 1 6 9 k 2 2 f c 2 b 5 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 1 0 h l 1 2 2 f c 2 a 3 . 3 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 3 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 4 1 . 2 k r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 1 6 9 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 27 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits (continued) figure 11 : v out = 5v, f sw = 500khz figure 1 2 : v out = 5 v, f sw = 500khz for <100k fb divider application 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 1 0 h l 1 2 2 f c 2 a 5 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 9 1 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 1 m r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 1 6 9 k 2 2 f c 2 b 5 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 1 0 h l 1 2 2 f c 2 a 5 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 3 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 6 8 . 1 k r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 1 6 9 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 28 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits (continued) figure 1 3 : v out = 3.3v, f sw = 2.2mhz figure 1 4 : v out = 3.3 v, f sw = 2.2m hz for <100k fb divider application 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 2 . 2 h l 1 2 2 f c 2 a 3 . 3 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 3 1 6 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 1 m r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 3 3 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 2 . 2 h l 1 2 2 f c 2 a 3 . 3 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 3 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 4 1 . 2 k r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 3 3 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 29 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits (continued) figure 1 5 : v out = 5v, f sw = 2.2mhz figure 1 4 : v out = 5 v, f sw = 2.2m hz for <100k fb divider application 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 2 . 2 h l 1 2 2 f c 2 a 5 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 9 1 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 1 m r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 3 3 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0 1 0 f c 1 a 0 . 1 f c 1 c 1 0 0 k r 1 0 . 1 f c 5 2 . 2 h l 1 2 2 f c 2 a 5 v / 2 . 2 a e n v o u t 1 0 f c 1 b s w 3 , 1 0 e n 5 v i n 2 f b 1 5 v c c 1 2 b s t 1 1 p g n d 4 , 9 p g 7 u 1 1 f c 4 1 0 0 k r 5 p g g n d 1 3 k r 4 v i n g n d 3 . 3 v - 3 6 v m p q 4 4 3 2 1 4 s s a g n d 1 3 6 8 . 1 k r 3 1 6 f r e q b i a s s y n c 6 p h a s e 1 8 4 . 7 n f c 3 r 2 s y n c p h a s e 3 3 k 2 2 f c 2 b 1 0 p f c 6 0 . 1 f c 1 d c 7 0 . 1 f r 6 1 0
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter mp q4432 rev. 1 .0 www.monolithicpower.com 30 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information qfn - 16 (3mmx4mm) non - wettable flank s i d e v i e w b o t t o m v i e w n o t e : 1 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 2 ) l e a d c o p l a n a r i t y s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 3 ) j e d e c r e f e r e n c e i s m o - 2 2 0 . 4 ) d r a w i n g i s n o t t o s c a l e . t o p v i e w r e c o m m e n d e d l a n d p a t t e r n p i n 1 i d m a r k i n g p i n 1 i d i n d e x a r e a p i n 1 i d 0 . 1 5 x 4 5 t y p . 0 . 1 5 x 4 5
mpq4432 - 36 v , 2.2a , low iq, synchronous step - down converter notice: the information in this document is subject to change without notice. please contact mps for current specifications. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp q4432 rev. 1 .0 www.monolithicpower.com 31 9/19/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information (continued) qfn - 16 ( 3mmx4mm ) wettable flank s i d e v i e w b o t t o m v i e w n o t e : 1 ) t h e l e a d s i d e i s w e t t a b l e . 2 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 3 ) l e a d c o p l a n a r i t y s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 4 ) j e d e c r e f e r e n c e i s m o - 2 2 0 . 5 ) d r a w i n g i s n o t t o s c a l e . t o p v i e w r e c o m m e n d e d l a n d p a t t e r n p i n 1 i d m a r k i n g p i n 1 i d i n d e x a r e a p i n 1 i d 0 . 1 5 x 4 5 t y p . 0 . 1 5 x 4 5 s e c t i o n a - a

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